The invention relates to a method for the hybrid integration of a discrete element on a semiconductor substrate.
Various approaches exist for integrating together components or elements forming part of an optoelectronic circuit. The ability to efficiently couple light amongst various components forming part of an optoelectronic circuit is a fundamental requirement for any such approach.
Optical and optoelectronic components may in some cases be integrated onto a semiconductor wafer monolithically, where all of the components are fabricated on the wafer. One method of coupling light amongst components monolithically integrated as part of an OEIC (optoelectronic integrated circuit) is to fabricate waveguides connecting the components on the OEIC concurrently with the fabrication of active and passive optical devices. This monolithic approach is a difficult undertaking, as the fabrication process required for one type of device or waveguide may be incompatible with that required for another. In addition, the semiconductor layer structures required to implement the various waveguides and devices may differ radically. For example, the layer structure required for a semiconductor diode laser may be completely different from that required for a waveguide. If this is the case, a possible solution is to etch the unwanted layers away from a certain area and epitaxially deposit or grow an alternate layer structure. However, this compromise is not amenable to efficient manufacturing, and the regrown layers may have lower quality.
In another integration scheme, an array of surface emitting lasers on an OEIC communicate with other OEICs through free space transmission. The optical signal is emitted perpendicular to the plane of the OEIC having the surface emitting lasers, and the optical beams impinge upon detectors on an OEIC placed above the lasers. Alternatively, the beams are reflected from a mirror back towards the same OEIC having the surface emitting lasers or reflected towards another OEIC. Again, the reflected beams impinge upon detecting elements on the OEIC. In either case, optical signals are distributed across the OEIC without the use of waveguides. A severe limitation of this technique is that the optical signal cannot be split. In addition, great accuracy is required to position the mirror array above the first OEIC.
Another method involves placing some separately fabricated (discrete) optoelectronic optical elements onto an OEIC which contains waveguides to couple light between various components. The OEIC must have placement locations or pits for the discrete components. Such an OEIC may be referred to as an optical wafer-bench, in which the substrate can be thought of as a xe2x80x9cmotherboardxe2x80x9d upon which components are placed. The OEIC may also contain some integrated components like photodetectors, high-speed electronics, etc. This approach involves the integration of the discrete optical elements, onto the wafer-bench containing other optical elements and is referred to as hybrid integration. The key to achieving efficient optical coupling is to position the optical elements precisely onto the wafer-bench. For instance, alignment of a laser with an integrated waveguide requires a high decree of vertical positioning accuracy. The lateral positioning of the laser is less problematic because it is possible to define tapered waveguides having a large numerical aperture in the lateral direction. The position of the laser relative to the waveguide will affect the insertion loss for the signal emanating from the laser. In another example, a modulator might be positioned between two segments of an integrated waveguide. Again, the position of the modulator (input and output) relative to the position of the waveguide determines how much light is lost simply in the coupling. The absence of a simple, reliable method for performing the vertical alignment step in this type of integration has been a factor limiting its widespread application.
The losses related to the connection of the optical elements influence the required sensitivity of detector elements as well as the optical output required of emitter elements. While losses within an optical element can be reduced by appropriate component design, it is difficult to factor in the losses associated with coupling between optical elements. Connection losses are inherently variable and this forces the OEIC designer to consider the effect of both the maximum and minimum optical signal power levels on the circuit. Any new method of minimizing coupling losses between active or passive optical elements and waveguides, minimizing the variability of such losses, or enhancing robustness and manufacturability, will be of tremendous value to the realization of cost-effective OEICs.
In the past, discrete devices have been aligned with other discrete devices or with integrated devices by methods which include some form of active positioning. For example, some systems employ a feed-back control loop to monitor light intensity as the device is being placed, the device being fixed in place when the intensity is optimum.
In U.S. Pat. No. 5,413,679 to Godbey, a method of producing a silicon membrane using a silicon alloy etch stop layer is disclosed and in U.S. Pat. No. 5,013,681 to Godbey et al, a method of producing a thin silicon-on-insulator layer is disclosed, also using a silicon alloy etch stop layer. In both of these methods, the purpose of the etch stop layer is to provide a backstop for the manufacture of a thin layer of silicon. The starting structure for these methods includes a thin layer of silicon (which in the case of the second above referenced patent is located on an insulating layer), an etch stop layer, and several other layers atop the etch stop layer. The layers atop the etch stop layer are etched away leaving the thin layer of silicon and the etch stop layer. The etch stop layer is then removed leaving the required thin layer of silicon. In these methods, the etch stop layer is not used for alignment purposes, and is not even present in the final manufactured article.
An object of the invention is to provide a method which uses a semiconductor heterostructure having waveguides defined to link both monolithic and hybrid integrated discrete optical elements to create a type of optical wafer-bench described above, with which very accurate vertical and lateral positioning of hybrid optical elements, like a laser, can be achieved.
The invention provides a technique addressing the difficulty in obtaining very accurate vertical positioning of discrete components on an OEIC.
According to a first broad aspect, the present invention provides a method for the hybrid integration of a discrete device on a semiconductor substrate comprising the steps of: a) forming an etch stop layer above a substrate; b) forming at least one semiconductor layer above the etch stop layer, the at least one semiconductor layer including a first layer fabricated directly on the etch stop layer, the etch stop layer having an etch rate which is slower than that of the first layer on the etch stop layer with a particular etch process; c) selectively etching with the particular etch process the at least one semiconductor layer above the etch stop layer down to the etch stop layer to define a first device pit having a base surface; d) placing in said device pit a first discrete device to rest on said base surface; wherein accurate vertical placement of said discrete device is achieved due to accuracy of the depth of said pit as determined by said etch stop layer.
According to a second broad aspect, the invention provides a method for the hybrid integration of a discrete device on a semiconductor substrate comprising the steps of: a) forming an etch stop layer above a substrate; b) forming at least one semiconductor layer above the etch stop layer, the at least one semiconductor layer including a first layer fabricated directly on the etch stop layer, the etch stop layer producing a characteristic signature when etched with a particular etch process and having an etch rate which is slow enough that upon detection of the characteristic signature during the etch process, the etch process can be quickly stopped; c) selectively etching with the particular etch process the at least one semiconductor layer above the etch stop layer down to the etch stop layer to define a first device pit having a base surface; d) placing in said device pit a first discrete device to rest on said base surface; wherein accurate vertical placement of said discrete device is achieved due to accuracy of the depth of said pit as determined by said etch stop layer.
In a preferred embodiment, the technique is used for the formation of hybrid OEIC""s. This involves forming a waveguide on the etch stop layer and etching through the layers of the waveguide to the etch stop layer. When a discrete device, for example a laser or a modulator, is placed in the pit it is vertically aligned with the core layer of the waveguide.
The precise vertical alignment afforded by the use of an etch stop alleviates many difficulties associated with coupling the optical signal between discrete elements.